Semiconductor Test Engineering Manager
Semiconductor Test Engineering Manager required on a permanent basis for a global organisation within the Semiconductor industry. As Semiconductor Test Engineering Manager, you will be accountable for providing technical leadership and line management for the Industrialisation team, who are responsible for ensuring the correct test solution capability throughout the design process, the use of appropriate tools/methods including verification by simulation and lab characterisation. As Semiconductor Test Engineering Manager, you can expect the following remuneration package:
• Basic salary of £100k + depending on experience
• 15% Annual Bonus
• 25 Days Holiday, plus Bank Holidays
• Private Pension Scheme
• Health Insurance
• Income Protection
• Free Lunch / Drinks Everyday
• Free Parking
• Extensive Learning and Development Opportunities
As Semiconductor Test Engineering Manager, your day-to-day duties will include but are not limited to:
• Provide expert advice on ASIC Architectures for testability. Advise on Design for Testability where appropriate. Advise on wafer and package level test choices.
• Manage 7 members of staff daily, including 3 people in the product team and 4 in the Test Engineering team.
• Ensure the specification of evaluation, qualification and production test requirements are created at the appropriate time and maintained throughout the development process.
• Ensure that PFMEA and process capability analysis are the responsibility of the Industrialisation team and provide general support to FMEA in the development process.
• Work closely with the ASIC design team to ensure that system verification, ASIC characterisation and production test development are considered together to de-risk and speed up the development of high volume production test solutions.
• Ensure that appropriate tools and solutions are utilised in the development process and ATE solutions, including Hardware simulation and emulation, database and yield analysis tools.
• Ensure the team utilise standardisation of ATE coding, improving test program structure and architecture to reduce inefficiencies in code development and longer term OPs support for variants or ASIC design / feature improvements.
• Ensure the most suitable ATE platform is selected for each project, considering capital costs, facilities requirements, engineering effort and product roadmap to achieve the targeted cost of test.
• Ensure that the Industrialisation team are trained and developed in line with the business requirements and individual career aspirations.
To be considered for the Semiconductor Test Engineering Manager, you must possess the following skills / experience:
• Approachable, with a team focused attitude and positive mindset when working on challenging projects.
• Knowledge of Analogue / Digital Integrated Circuits, ASIC evaluation, ASIC modelling and verification, ATE and automated measurement system capabilities (package and wafer level), BIST / DFT specification and implementation.
• Ability to lead, manage and develop a team is essential including performance reviews, salary reviews, holiday requests,
• Strong communication and stakeholder management skills.
• Ideally qualified in Electronic Engineering to degree level.
If you meet the above criteria and are interested in applying for the Semiconductor Test Engineering Manager, please click apply today.
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